System-on-chip having a merged frame rate converter and video codec and frame rate converting method thereof
US11109033B2 · kind B2 · utility
1Cited by
4References
14Claims
0Family size
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Key dates
| Filing date | Jul 19, 2019 |
| Grant date | Aug 31, 2021 |
| Priority date | — |
| Expiry date | Jul 19, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/86
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system-on-chip which includes a video codec including a deblocking filter includes a motion estimator that calculates a motion vector of an input image, a motion compensator that compensates for a motion of the input image by using the motion vector, and a parameter generator that allows image data, in which the motion is compensated, to be transferred to and filtered by the deblocking filter of the video codec.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.