Testing an integrated circuit having conservative reversible logic

US11112458B1 · kind B1 · utility

Assignee

• NXP B.V. · NL

Inventor

• Jan-Peter Schat · Hamburg, DE

Key dates

• Filing date: Aug 21, 2020
• Grant date: Sep 7, 2021
• Expiry date: Aug 21, 2040

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/31701
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

During a test for integrated circuit aging effects, contents of a first set of flip flop circuits are transferred to a second set of flip flop circuits. A first test value is applied to inputs of a combinatorial logic circuit and outputs from the combinatorial logic circuitry are provided to inputs of the first set of flip flop circuits. The combinatorial logic circuitry is reversible and conservative. The outputs from the first flip flop circuits are compared to the first test value to determine if there is a match. A second test value is applied to the inputs of the combinatorial logic circuitry and the outputs from the combinatorial logic circuitry are provided to inputs of the first set of flip flop circuits. The outputs from the first flip flop circuits are compared to the second test value to determine if there is a match, and when the test mode finishes, contents of the second set of flip flop circuits are transferred to the first set of flip flop circuits.