Operation instruction scheduling method and apparatus for nand flash memory device
US11112998B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2017 |
| Grant date | Sep 7, 2021 |
| Priority date | — |
| Expiry date | Apr 13, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/0679
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention discloses an operation instruction scheduling method and device for a NAND flash memory device. The method comprises: performing task decomposition on the operation instruction of the NAND flash memory device, and sending an obtained task to a corresponding task queue; sending a current task to a corresponding arbitration queue according to a task type of the current task in the task queue; and scheduling a NAND interface for a to-be-executed task in the arbitration queue according to priority information of the arbitration queue. Embodiments of the present invention can efficiently realize operation instruction scheduling of a NAND flash memory device, improve flexibility of operation instruction scheduling of the NAND flash memory device, and improve overall performance of the NAND flash memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.