Speculative branch pattern update
US11113067B1 · kind B1 · utility
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18Claims
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Key dates
| Filing date | Nov 17, 2020 |
| Grant date | Sep 7, 2021 |
| Priority date | — |
| Expiry date | Nov 17, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3848
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a microprocessor, comprising: first logic configured to detect that a fetched cache address matches at least one of two previous cache addresses; and second logic configured to adjust a branch pattern used for conditional branch prediction based on the match and combine the cache address with the adjusted branch pattern to form a conditional branch predictor address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.