Coordinating power transitions between a smart interconnect and heterogeneous components
US11113076B2 · kind B2 · utility
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2References
22Claims
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Key dates
| Filing date | Oct 5, 2018 |
| Grant date | Sep 7, 2021 |
| Priority date | — |
| Expiry date | Jan 18, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/034
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Described is an apparatus comprising a semiconductor interconnect substrate and an interface. The semiconductor interconnect substrate may be electrically coupled to one or more components mounted thereon. The interface may be operable to carry a configuration command set to the one or more components in a normal operation mode subsequent to a power-up mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.