Patent · US Active

Method and apparatus for protecting a program counter structure of a processor system and for monitoring the handling of an interrupt request

US11113099B2 · kind B2 · utility

0Cited by

7References

10Claims

0Family size

Assignee

Robert Bosch GmbH · DE

Inventors

Alexander Emperle · Balingen, DE
Jo Pletinckx · Sersheim, DE
Jan Scheuing · Brackenheim, DE

Key dates

Filing date	May 4, 2016
Grant date	Sep 7, 2021
Priority date	—
Expiry date	Jul 8, 2036

Classification

Technology area (CPC G)Physics
CPC primaryG06F13/24
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A processor system comprises at least a program counter structure, an interrupt control device, a memory, and an apparatus. The interrupt control device is configured to respond to an interrupt request by providing the program counter structure with an address associated with the interrupt request. The program counter structure is configured to output the address to the memory via a memory interface. The apparatus is configured to protect the program counter structure in case of an interrupt request, the apparatus includes an interface, a comparing device, and an outputting device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.