Distributed architecture for fault monitoring
US11113168B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 9, 2018 |
| Grant date | Sep 7, 2021 |
| Priority date | — |
| Expiry date | Mar 31, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for detecting an anomaly in a power semiconductor device are disclosed. A system includes a server computing device and one or more local components communicatively coupled to the server computing device. Each local component includes sensors positioned adjacent to the power semiconductor device for sensing properties thereof. Each local component receives data corresponding to one or more sensed properties of the power semiconductor device from the sensors and transmits the data to the server computing device. The server computing device utilizes the data, via a machine learning algorithm, to generate a set of eigenvalues and associated eigenvectors and select a selected set of eigenvalues and associated eigenvectors. Each local component conducts a statistical analysis of the selected set of eigenvalues and associated eigenvectors to determine that the data is indicative of the anomaly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.