Patent · US Active

Semiconductor package

US11114364B2 · kind B2 · utility

2Cited by
12References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 18, 2018
Grant dateSep 7, 2021
Priority date
Expiry dateMar 16, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/15311
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Disclosed is a semiconductor package comprising first and second semiconductor structures spaced apart on a first substrate, a heat sink covering the first and second semiconductor structure and the first substrate, and a thermal interface material layer between the heat sink and the first and second semiconductor structures. The first semiconductor structure includes a first sidewall adjacent to the second semiconductor structure and a second sidewall opposite the first sidewall. The thermal interface material layer includes a first segment between the first and second semiconductor structures and a second segment protruding beyond the second sidewall. A first distance from a top surface of the first substrate to a lowest point of a bottom surface of the first segment is less than a second distance from the top surface of the first substrate to a lowest point of a bottom surface of the second segment.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.