Protection circuit with a FET device coupled from a protected bus to ground
US11114432B2 · kind B2 · utility
1Cited by
2References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2019 |
| Grant date | Sep 7, 2021 |
| Priority date | — |
| Expiry date | Mar 5, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D10/00
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a voltage input circuit node and a ground voltage node. A first transistor is coupled between the voltage input circuit node and the ground voltage node. A triggering circuit is coupled between the voltage input circuit node and the ground voltage node in parallel with the first transistor. The triggering circuit includes a trigger diode. An output of the triggering circuit is coupled to a control terminal of the first transistor. A load is powered by coupling the load between the voltage input circuit node and the ground voltage node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.