SRAM device provided with a plurality of sheets serving as a channel region
US11114447B2 · kind B2 · utility
1Cited by
12References
13Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 18, 2020 |
| Grant date | Sep 7, 2021 |
| Priority date | — |
| Expiry date | Feb 18, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
Abstract
An SRAM device includes first, second and third transistors, which are used as a pass gate transistor, a pull-down transistor, and a pull-up transistor, respectively. A channel region of each transistor may include a plurality of semiconductor sheets that are vertically stacked on a substrate. The semiconductor sheets used as the channel regions of the first and second transistors may have a width greater than the semiconductor sheets used as channel regions of the third transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.