Array substrate and fabricating method thereof, display panel and display device
US11114469B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2019 |
| Grant date | Sep 7, 2021 |
| Priority date | — |
| Expiry date | Apr 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D99/00
Abstract
The present disclosure is in the field of display technologies, and provides an array substrate including an IGZO film layer, a gate layer, and a gate insulating layer. The gate layer is provided with broken lines at a position thereof overlapping the IGZO film layer to form a first gate line and a second gate line. The gate insulating layer is disposed between the IGZO film layer and the gate layer, and is provided with at least two through holes thereon, in which the first gate line is connected with the IGZO film layer through one of the through holes, and the second gate line is connected with the IGZO film layer through another through hole, thus, connecting the IGZO film layer in series into the gate layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.