Patent · US Active

Semiconductor device and method for manufacturing same

US11114527B2 · kind B2 · utility

0Cited by
4References
27Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 11, 2020
Grant dateSep 7, 2021
Priority date
Expiry dateMar 11, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/663
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A terrace insulating film (SL) to be overridden by a gate electrode (G) of an nLDMOS device is configured by LOCOS, and a device isolation portion (SS) is configured by STI. Furthermore, on an outermost periphery of an active region where a plurality of nLDMOS devices are formed, a guard ring having the same potential as that of a drain region (D) is provided. And, via this guard ring, the device isolation portion (SS) is formed in a periphery of the active region, thereby not connecting but isolating the terrace insulating film (SL) and the device isolation portion (SS) from each other.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.