Dynamic short circuit protection
US11115019B2 · kind B2 · utility
1Cited by
5References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 9, 2018 |
| Grant date | Sep 7, 2021 |
| Priority date | — |
| Expiry date | Jun 4, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/24
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Circuitry includes a pair of switches arranged in series, and a gate driver. The gate driver, responsive to a magnitude of current through one of the switches exceeding a threshold, discharges a gate of the one through a first resistor. The gate driver also, responsive to a voltage across a parasitic inductance of the switch becoming zero, discharges the gate through a second resistor but not the first resistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.