Method and circuits for charge pump devices of phase-locked loops
US11115030B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 16, 2019 |
| Grant date | Sep 7, 2021 |
| Priority date | — |
| Expiry date | Jan 16, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/0896
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A charge pump includes: (I) a current source; (II) a p-channel source current network including: a first p-channel transistor; a second p-channel transistor; a p-channel current switch including at least one source terminal coupled to the drain terminal of the first p-channel transistor, at least one gate coupled to a phase comparator, and at least one drain terminal; a third p-channel transistor; and (III) a n-channel sink current network including: a first n-channel transistor; a second n-channel transistor; a third n-channel transistor; a n-channel current switch comprising at least one drain terminal coupled to the source terminal of the third n-channel transistor, at least one gate coupled to the phase comparator; and at least one source terminal coupled to the drain terminal of the first n-channel transistor; and wherein the p-channel source current network and the n-channel sink current network draw a baseline current from the first p-channel transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.