Error detection
US11115061B2 · kind B2 · utility
3Cited by
1References
15Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Sep 2, 2020 |
| Grant date | Sep 7, 2021 |
| Priority date | — |
| Expiry date | Sep 2, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A datum is written to a memory, by splitting a binary word, representative of the datum and an error correcting or detecting code, into a first part and a second part. The first part is written at a logical address in a first memory circuit. The second part is written at the logical address in a second memory circuit. The error correcting or detecting code is dependent on both the datum and the logical address.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.