Check pointing of accumulator register results in a microprocessor

US11119772B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Steven J. Battle · Austin, US
• Brian D. Barrick · Pflugerville, US
• Susan E. Eisen · Round Rock, US
• Andreas Wagner · Eppelheim, DE
• Dung Q. Nguyen · Austin, US
• Brian W. Thompto · Austin, US
• Hung Q. Le · Austin, US
• Kenneth L. Ward · Austin, US

Key dates

• Filing date: Dec 6, 2019
• Grant date: Sep 14, 2021
• Expiry date: Dec 6, 2039

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F17/16
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A computer system, processor, and method for processing information is disclosed that includes at least one processor having a main register file, the main register file having a plurality of entries for storing data; one or more execution units including a dense math execution unit; and at least one accumulator register file, the at least one accumulator register file associated with the dense math execution unit. The processor in an embodiment is configured to process data in the dense math execution unit where the results of the dense math execution unit are written to a first group of one or more accumulator register file entries, and after a checkpoint boundary is crossed based upon, for example, the number “N” of instructions dispatched after the start of the checkpoint, the results of the dense math execution unit are written to a second group of one or more accumulator register file entries.