Semiconductor device with isolation structure
US11121072B1 · kind B1 · utility
1Cited by
5References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2020 |
| Grant date | Sep 14, 2021 |
| Priority date | — |
| Expiry date | Mar 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/49175
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a transistor die having top and bottom die surfaces, an electrically conductive structure, and input and output pads formed at the top die surface. An isolation structure is interposed between the input and output pads of the transistor die. The isolation structure extends above the top die surface, is coupled to the conductive structure, and is connected to a common return path of the transistor die. The isolation structure may be formed from one or more bondwires and is configured to reduce mutual coupling between input and output interconnects of the semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.