Semiconductor structure and method for forming the same
US11121141B2 · kind B2 · utility
0Cited by
23References
20Claims
0Family size
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Key dates
| Filing date | May 6, 2019 |
| Grant date | Sep 14, 2021 |
| Priority date | — |
| Expiry date | Aug 29, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure includes a semiconductor substrate, at least one raised dummy feature, at least one memory cell, and at least one word line. The raised dummy feature is present on the semiconductor substrate and defines a cell region on the semiconductor substrate. The memory cell is present on the cell region. The word line is present adjacent to the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.