Patent · US Active

LDMOS device and manufacturing method thereof

US11121252B2 · kind B2 · utility

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9Claims
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Key dates

Filing dateOct 15, 2019
Grant dateSep 14, 2021
Priority date
Expiry dateOct 15, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/111

Abstract

The present disclosure provides an LDMOS device and a manufacturing method thereof. The LDMOS device includes: a substrate, a drift region formed in the substrate; a gate structure, located on the substrate on one side of the drift region, and covering part of the drift region; a drain region, located in the drift region on one side of the gate structure, an isolation structure located on the substrate, the isolation structure located between the drain region and the gate structure; a gate electrode, located on the gate structure and electrically connected with the gate structure; a drain electrode, located on the drain region and electrically connected with the drain region; a block layer, covering the drift region and the isolation structure between the gate electrode and the drain electrode in a shape-preserving manner; and a groove electrode located on the block layer, the groove electrode located between the isolation structure and the gate structure, and at least covering part of the top of the isolation structure. The LDMOS device improves a device breakdown voltage, and cannot increase Rdson.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.