Transconductance amplifier based on self-biased cascode structure
US11121677B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 26, 2016 |
| Grant date | Sep 14, 2021 |
| Priority date | — |
| Expiry date | Apr 3, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G1/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Provided in the present invention is a transconductance amplifier based on a self-biased cascode structure. The transconductance amplifier includes a self-biased cascode input-stage structure constituted by PMOS (P-channel Metal Oxide Semiconductor) input transistors M1, M2, M3 and M4, a self-biased cascode first-stage load structure constituted by NMOS (N-channel Metal Oxide Semiconductor) transistors M5, M6, M7 and M8, a second-stage common-source amplifier structure constituted by an NMOS transistor M9 and a PMOS transistor M10, a bias circuit structure constituted by NMOS transistors M11 and M12 and a PMOS transistor M13, an amplifier compensation capacitor Cc, an amplifier load capacitor CL, a reference current source Iref and a PMOS transistor M0 that provides a constant current source function. Further provided in the present invention is a transconductance amplifier based on a self-biased cascode structure, which adopts an NMOS transistor as an input transistor. Both input transistors and load transistors of a first-stage amplifier of the present invention adopt self-biased cascode structures, such that the output impedance and the DC gain of the first-stage amplifier are i…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.