Bias circuitry
US11121681B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 31, 2020 |
| Grant date | Sep 14, 2021 |
| Priority date | — |
| Expiry date | Mar 31, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/555
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Bias circuitry is disclosed with a bias drive device having a first current terminal coupled to a voltage supply node, a bias control terminal coupled to a control node, and a second current terminal coupled to a bias output node. An impedance control device has a third current terminal and an impedance control terminal that are coupled together and a fourth current terminal coupled to ground. An output impedance resistor is coupled between the third current terminal and the bias output node. A pull-down device is coupled between the bias output node and the fixed voltage node, wherein a higher voltage applied to the control node sets an output impedance at the bias output node to approximately a lower impedance of the pull-down device and a lower voltage applied to the control node sets the output impedance to approximately the resistance of the output impedance resistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.