Instruction scheduling facilitating mitigation of crosstalk in a quantum computing system
US11121725B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 18, 2019 |
| Grant date | Sep 14, 2021 |
| Priority date | — |
| Expiry date | Jan 8, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/611
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, computer-implemented methods, and computer program products that facilitate instruction scheduling to mitigate quantum gate crosstalk errors and/or qubit decoherence errors in a quantum device based on device characterization data are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise an assessment component that obtains device characterization data of a quantum device. The computer executable components can further comprise a scheduler component that generates a quantum gate execution schedule comprising parallel execution and serial execution of quantum gates in the quantum device based on the device characterization data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.