Array substrate and display device
US11126048B2 · kind B2 · utility
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19Claims
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Key dates
| Filing date | Sep 22, 2017 |
| Grant date | Sep 21, 2021 |
| Priority date | — |
| Expiry date | May 29, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An array substrate includes gate lines, data lines, and pixel units defined by adjacent gate lines and adjacent data lines, the gate lines, the data lines, and the pixel units being formed on a substrate, wherein the gate line gradually becomes wider from a driving start end to a driving terminal end. on the array substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.