Semiconductor device and method of manufacturing semiconductor device
US11127822B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2017 |
| Grant date | Sep 21, 2021 |
| Priority date | — |
| Expiry date | Apr 25, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/112
Abstract
At edge termination region, a trench is disposed near an interface of an active region. Inside the trench, an embedded insulating film is embedded, and inside the embedded insulating film, a FP long in a direction of depth is disposed. The FP curves outwardly away from an inner sidewall of the trench as a depth from a base front surface increases. At least near a bottom end of the FP, a distance between the FP and the inner sidewall of trench is greater than a width of the groove. The FP is connected to a front surface electrode that extends on the embedded insulating film. As a result, breakdown voltage can be enhanced, adverse effects of the surface charge can be reduced, and chip size can be further reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.