Transistor outline package with ground connection
US11128101B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 27, 2019 |
| Grant date | Sep 21, 2021 |
| Priority date | — |
| Expiry date | Aug 27, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/06226
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A transistor outline package is provided that includes a header having an upper surface, a lower surface, an inner surface, and a mounting area for an optoelectronic component in the inner surface. The header has a signal pin configured to connect an optoelectronic component. The signal pin is disposed in a feedthrough and protrudes from the lower surface. A printed circuit board attached on the signal pin substantially coaxially thereto. The printed circuit board is mechanically and electrically connected to the header by a metal block arranged adjacent to the feedthrough to provide grounding.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.