Signal detection circuit, optical receiver, master station device, and signal detection method
US11128385B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 23, 2020 |
| Grant date | Sep 21, 2021 |
| Priority date | — |
| Expiry date | Jun 23, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0296
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A signal detection circuit includes: a first DC voltage remover that removes a DC voltage from an input differential signal; a limiting amplifier that adjusts an amplitude of the input differential signal; a reset signal generator that generates an internal reset signal on the basis of the input differential signal obtained after the amplitude is adjusted; a first bias voltage applying unit that generates a differential signal for detection by applying a bias voltage to the signal from which the DC voltage is removed; and a flip-flop circuit that generates a packet detection signal by holding a state indicating input of a packet signal on the basis of the differential signal for detection and releasing the holding on the basis of the internal reset signal. The reset signal generator includes: a differential single-phase conversion circuit; a voltage holding circuit; and a voltage comparison circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.