Shift register unit comprising input circuit, output circuit, and first node control circuit, gate driving circuit, display device, and driving method
US11132934B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 16, 2019 |
| Grant date | Sep 28, 2021 |
| Priority date | — |
| Expiry date | Aug 16, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register unit, a gate driving circuit, a display device, and a driving method are provided. The shift register unit includes an input circuit, an output circuit, and a first node control circuit. The input circuit is configured to charge a first node in response to an input signal; the output circuit is configured to output an output signal at an output terminal under control of a level signal of the first node; and the first node control circuit is configured to receive a precharge control signal from a precharge control terminal and charge the first node in response to the precharge control signal before the output terminal outputs the output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.