Patent · US Active

Array substrate and manufacturing method thereof, and display device

US11133363B2 · kind B2 · utility

0Cited by
0References
20Claims
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Assignee

Inventors

Key dates

Filing dateAug 30, 2019
Grant dateSep 28, 2021
Priority date
Expiry dateAug 30, 2039

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D86/60

Abstract

The present discloses an array substrate and a manufacturing method thereof, and a display device. The array substrate includes a first transistor and a second transistor. The first transistor includes a first active layer, a first gate, a first source and a first drain. The second transistor includes a second active layer, a second gate, a second source and a second drain. An orthographic projection of the second source on the base substrate and an orthographic projection of the second drain on the base substrate at least partially overlap. One of the second source and the second drain is in the same layer as and made from the same material as the first gate. The first source and the first drain are in the same layer as and made from the same material as the other of the second source and the second drain.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.