Silicon-controlled-rectifier electrostatic protection structure and fabrication method thereof
US11139288B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 18, 2020 |
| Grant date | Oct 5, 2021 |
| Priority date | — |
| Expiry date | Apr 8, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D18/80
Abstract
A silicon-controlled-rectifier electrostatic protection structure and a fabrication method are provided. The structure includes: a substrate of P-type; a first N-type well; a second N-type well; a third N-type well; an anode P-type doped region in the first N-type well; second N-type doped regions at sides of the first N-type well; first P-type doped regions at sides of the first N-type well; third N-type doped regions at sides of the first N-type well; gate structures and fourth N-type doped regions at the sides of the first N-type well; and fifth N-type doped regions at the sides of the first N-type well. The fourth N-type doped regions and the third N-type doped regions are disposed at sides of each of the gate structures along a first direction respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.