Array substrate and manufacturing method thereof, display panel and display device
US11139356B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2019 |
| Grant date | Oct 5, 2021 |
| Priority date | — |
| Expiry date | Oct 18, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K71/40
Abstract
The present disclosure discloses an array substrate with a display area, a manufacturing method thereof, a display panel, and a display device. The array substrate with the display area includes a base substrate, and a thin film transistor structure on a surface of the base substrate. The thin film transistor structure is in the display area, the thin film transistor structure includes at least a source-drain pattern and a planarization pattern. The source-drain pattern and the planarization pattern are on a side of the thin film transistor structure away from the base substrate. A surface of the planarization pattern away from the base substrate and a surface of the source-drain pattern away from the base substrate are substantially in a same plane, the planarization pattern has a first slot, and the source-drain pattern is accommodated in the first slot.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.