Patent · US Active

Analog-to-digital converter for a capacitive adiabatic logic circuit

US11139821B2 · kind B2 · utility

0Cited by
4References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 11, 2020
Grant dateOct 5, 2021
Priority date
Expiry dateSep 11, 2040

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M1/68
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

An analog-to-digital converter for an adiabatic logic circuit, including at least one variable-capacitance cell, the cell including first and second main terminals and at least one control terminal insulated from its first and second main terminals and capable of receiving a control voltage to vary the capacitance between its first and second main terminals between a low value and a high value, wherein: the cell has its first main terminal coupled to a node of application of a variable periodic converter power supply voltage; the cell has its second main terminal coupled to a node for supplying a binary output signal of the converter; and the cell receives on its first control terminal an analog input voltage of the converter.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.