Semiconductor package
US11145626B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2019 |
| Grant date | Oct 12, 2021 |
| Priority date | — |
| Expiry date | Oct 1, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06586
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a base structure having a base pad, a first semiconductor chip on the base structure, and having a first connection pad bonded to the base pad, a first bonding structure including an base insulation layer of a base structure and a first lower insulation layer of the first semiconductor chip bonded to the base insulation layer, a second semiconductor chip on the first semiconductor chip, and having a second connection pad connected to the first through-electrode, and a second bonding structure including a first upper insulation layer of the first semiconductor chip, and a second lower insulation layer of the second semiconductor chip bonded to the first upper insulation layer, and the first upper insulation layer has a dummy insulation portion extending onto the base structure around the first semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.