Methods of controlling operation of nonvolatile memory devices and data converters for performing the same
US11150987B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 3, 2020 |
| Grant date | Oct 19, 2021 |
| Priority date | — |
| Expiry date | Jun 3, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/13
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Channel selection information indicate positions of data bits of input data, positions of error correction code (ECC) parity bits for correcting errors in the input data, and positions of state shaping parity bits. The ECC parity bits and the state shaping parity bits are generated to cause a decrease in a quantity of memory cells, of the plurality of memory cells, in which at least one target state among a plurality of states is programmed. An alignment vector is generated based on aligning the data bits of the input data, the ECC parity bits, and the state shaping parity bits, based on the channel selection information. A codeword is generated based on simultaneously performing state shaping and ECC encoding with respect to the alignment vector. Write data are written in the nonvolatile memory device based on the codeword.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.