Methods and apparatus to implement multiple inference compute engines
US11151074B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2019 |
| Grant date | Oct 19, 2021 |
| Priority date | — |
| Expiry date | Aug 15, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0038
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus to implement multiple inference compute engines are disclosed herein. A disclosed example apparatus includes a first inference compute engine, a second inference compute engine, and an accelerator on coherent fabric to couple the first inference compute engine and the second inference compute engine to a converged coherency fabric of a system-on-chip, the accelerator on coherent fabric to arbitrate requests from the first inference compute engine and the second inference compute engine to utilize a single in-die interconnect port.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.