Multi-bit read-only memory device
US11152060B2 · kind B2 · utility
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3References
8Claims
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Key dates
| Filing date | Jun 21, 2019 |
| Grant date | Oct 19, 2021 |
| Priority date | — |
| Expiry date | Jun 21, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B20/38
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Some embodiments include apparatuses having non-volatile memory cells, each of the non-volatile memory cells to store more than one bit of information; data lines, at most one of the data lines electrically coupled to each of the non-volatile memory cells; a circuit including transistors coupled to the data lines, the transistors including gates coupled to each other; and an encoder including input nodes and output nodes, the input nodes to receive input information from the data lines through the transistors, and the output nodes to provide output information having a value based on a value of the input information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.