Gate fusion for measure in quantum computing simulation
US11157667B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2018 |
| Grant date | Oct 26, 2021 |
| Priority date | — |
| Expiry date | Nov 3, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/455
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for simulating a quantum circuit based on fusion of at least a portion of a measure gate is provided. Data representing a quantum circuit comprising a quantum gate and a measure gate is received. The measure gate in the quantum circuit is divided into one or more virtual gates and at least one of the one or more virtual gates is fused with the quantum gate. The gate fusion combines the operations of the fused gates and cache blocking to more efficiently simulate the quantum circuit. In one embodiment, the simulation of the quantum circuit is executed locally on a computing device. Alternatively, the simulation of the quantum circuit is performed remotely over a network via an application program interface (“API”) and results of the simulation are reported via the API.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.