Patent · US Active

Implementing write ports in register-file array cell

US11163568B2 · kind B2 · utility

0Cited by

5References

17Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Saiful Islam · Austin, US
Sam Gat-Shang Chu · Round Rock, US
Dung Q. Nguyen · Austin, US
Binglong Zhang · Austin, US
Howard Levy · Cedar Park, US
David R. Terry · Austin, US
Steven J. Battle · Austin, US

Key dates

Filing date	Sep 6, 2018
Grant date	Nov 2, 2021
Priority date	—
Expiry date	Dec 6, 2038

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY02D10/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An approach is provided in which a system writes a set of data into a register file entry that includes a first memory array and a second memory array. The register file entry also includes a set of first write ports corresponding to the first memory array and a set of second write ports corresponding to the second memory array. The system configures a selection bit based on determining that a selected one of the set of first write ports is utilized to store the set of data in the first memory array. In turn, the system reads the set of data out of the first memory array based on the configured selection bit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.