Method of aging transistor and display device including the transistor
US11164526B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2020 |
| Grant date | Nov 2, 2021 |
| Priority date | — |
| Expiry date | Mar 6, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/043
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display device including pixels is provided. Each of the pixels includes a first transistor having a gate electrode connected to a first node, a first electrode connected to a second node, and a second electrode connected to a third node, a second transistor having a gate electrode connected to a first scan line, a first electrode connected to a data line, and a second electrode connected to the second node, and a third transistor having a first gate electrode connected to the first scan line, a second gate electrode, a first electrode connected to the first node, and a second electrode connected to the third node. The second gate electrode may be in a floating state, and the third transistor may be aged to alleviate a leakage current in order to improve image generation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.