Adaptive baseline correction for delta amplification
US11165286B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2020 |
| Grant date | Nov 2, 2021 |
| Priority date | — |
| Expiry date | Jun 12, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B5/79
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A data demodulating circuit includes a sensing circuit sensing a power signal applied to a coil at first and second times, and outputting an analog value representing a difference in voltage of the power signal at the first and second times. An analog-to-digital converter digitizes the analog value output by the analog voltage differential sensing circuit to produce a digital code. A compensation circuit, over a period of time, compares a present value of the digital code to a first value of the digital code during the period, and subtracts a given value from the present value of the digital code if the present value is greater than the first value but add the given value to the present value of the digital code if the present value is less than the first value. An accumulator accumulates output of the compensation circuit, and a filter filters output of the accumulator.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.