Memory module, memory device, and processing device having a processor mode, and memory system
US11169711B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 29, 2019 |
| Grant date | Nov 9, 2021 |
| Priority date | — |
| Expiry date | Jan 6, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory module includes a memory device, a command/address buffering device, and a processing data buffer. The memory device includes a memory cell array, a first set of input/output terminals, each terminal configured to receive first command/address bits, and a second set of input/output terminals, each terminal configured to receive both data bits and second command/address bits. The command/address buffering device is configured to output the first command/address bits to the first set of input/output terminals. The processing data buffer is configured to output the data bits and second command/address bits to the second set of input/output terminals. The memory device is configured such that the first command/address bits, second command/address bits, and data bits are all used to access the memory cell array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.