Distributed shared memory paging
US11169931B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2019 |
| Grant date | Nov 9, 2021 |
| Priority date | — |
| Expiry date | Jan 29, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/657
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for obtaining metadata may include: receiving, by a director, an I/O operation directed to a target offset of a logical device, wherein the director is located on a board including a local page table used by components on the board; querying the local page table for a global memory address of first metadata for the target offset of the logical device; and responsive to the local page table not having the global memory address of the first metadata for the target offset of the logical device, using at least a first indirection layer to obtain the global memory address of the first metadata. The global memory may be a distributed global memory including memory segments from multiple different boards each including its own local page table. Compare and swap operations may be used to perform atomic operations to ensure synchronized access when updating the distributed global memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.