Trace length on printed circuit board (PCB) based on input/output (I/O) operating speed
US11169940B2 · kind B2 · utility
0Cited by
6References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2020 |
| Grant date | Nov 9, 2021 |
| Priority date | — |
| Expiry date | Jan 7, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A wireline communications system is described. The wireline communications system includes a printed circuit board (PCB). The wireline communications system also includes a system on chip (SoC) die on the PCB. The wireline communications system further includes an external memory device coupled to a memory interface of the SoC die. The external memory device is coupled to the memory interface of the SoC die through a PCB trace. A length of the PCB trace is configured according to an operating speed of the memory interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.