Efficient memory utilization and egress queue fairness
US11171884B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2019 |
| Grant date | Nov 9, 2021 |
| Priority date | — |
| Expiry date | Mar 13, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/3036
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a network device includes multiple ports to be connected to a packet data network so as to serve as both ingress and egress ports in receiving and forwarding of data packets including unicast and multicast data packets, a memory coupled to the ports and to contain a combined unicast-multicast user-pool storing the received unicast and multicast data packets, and packet processing logic to compute a combined unicast-multicast user-pool free-space based on counting only once at least some of the multicast packets stored once in the combined unicast-multicast user-pool, compute an occupancy of an egress queue by counting a space used by the data packets of the egress queue in the combined unicast-multicast user-pool, apply an admission policy to a received data packet for entry into the egress queue based on at least the computed occupancy of the egress queue and the computed combined unicast-multicast user-pool free-space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.