Per chiplet thermal control in a disaggregated multi-chiplet system
US11175709B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Aug 26, 2019 |
| Grant date | Nov 16, 2021 |
| Priority date | — |
| Expiry date | Oct 4, 2039 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Particular embodiments described herein provide for an electronic device that can be configured to include a plurality of chiplets, a plurality of resources, a system thermal engine, and at least one processor. The at least one processor is configured to cause the system thermal engine to monitor the plurality of chiplets, where the plurality of chiplets are part of a multi-chip module, determine that a first chiplet from the plurality of chiplets has reached a threshold temperature, and reduce power to the first chiplet without reducing power to the other chiplets in the plurality of chiplets.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.