Graph-computing-oriented heterogeneous in-memory computing apparatus and operational method thereof
US11176046B2 · kind B2 · utility
3Cited by
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7Claims
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Key dates
| Filing date | Jul 20, 2020 |
| Grant date | Nov 16, 2021 |
| Priority date | — |
| Expiry date | Jul 20, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a graph-computing-oriented heterogeneous in-memory computing apparatus, comprising a memory control unit, a digital signal processing unit, and a plurality of analog signal processing units using the memory control unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.