System for link management between multiple communication chips
US11176069B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 2020 |
| Grant date | Nov 16, 2021 |
| Priority date | — |
| Expiry date | May 28, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments relate to an integrated circuit of an electronic device that coordinates activities with another integrated circuit of the electronic device. The integrated circuit includes an interface circuit and a processor circuit. The interface circuit communicates over a multi-drop bus connected to multiple electronic components. The processor circuit receives an authorization request from the integrated circuit via the interface circuit and the multi-drop bus. The received authorization request relates to authorization to perform an activity on the other integrated circuit. In response to receiving the authorization request, the processor circuit determines whether the other integrated circuit is authorized to execute the activity. In response to determining that the other integrated circuit is authorized to execute the activity, the processor circuit sends, to the other integrated circuit over a configurable direct connection, an authorization signal authorizing the other integrated circuit to execute the activity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.