Semiconductor device
US11177346B2 · kind B2 · utility
1Cited by
6References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2019 |
| Grant date | Nov 16, 2021 |
| Priority date | — |
| Expiry date | Nov 7, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/797
Abstract
A semiconductor device including an active fin that protrudes from a substrate and forms a plurality of recess regions spaced apart from each other, a gate pattern between the plurality of recess regions that covers a lateral surface and a top surface of the active fin, a plurality of source/drain patterns in the plurality of recess regions, and a diffusion reduction region adjacent to each of a plurality of bottoms of the plurality of recess regions and each of a plurality of sidewalls of the plurality of recess regions, the diffusion reduction region including a dopant having a lower diffusion coefficient than phosphorus (P).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.