Clock and data recovery circuit and frequency maintaining method
US11177812B2 · kind B2 · utility
0Cited by
7References
18Claims
0Family size
Assignee
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Key dates
| Filing date | Nov 24, 2020 |
| Grant date | Nov 16, 2021 |
| Priority date | — |
| Expiry date | Nov 24, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/146
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
When digital input data disappear temporarily, within a counting period of the counter and pulse generator, an output voltage of the voltage generator rises, a threshold detector compares the output voltage of the voltage generator with a plurality of threshold values to generate a plurality of comparison results, and a logic gate unit generates a control signal according to the comparison results, to a charge pump, so that the charge pump controls the voltage-controlled oscillator to accelerate or decelerate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.