Method to determine the oldest instruction in an instruction queue of a processor with multiple instruction threads
US11182167B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2019 |
| Grant date | Nov 23, 2021 |
| Priority date | — |
| Expiry date | Jun 11, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3856
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method to determine an oldest instruction in an instruction queue of a processor with multiple instruction threads, wherein each of the multiple instruction threads have a unique thread identifier. The method includes tagging each instruction thread, of the multiple instruction threads, in the instruction queue with a unique tag number according to a round-robin scheme, wherein the unique tag number includes the unique thread identifier for each instruction thread and a round number in the round-robin scheme. The method further includes selecting, for each instruction thread, of the multiple instruction threads, the instruction thread with a lowest tag number from the multiple instruction threads in the instruction queue that are tagged with an oldest round number from the round-robin scheme.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.