Sense amplifier circuit and semiconductor memory device
US11183230B2 · kind B2 · utility
2Cited by
4References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2020 |
| Grant date | Nov 23, 2021 |
| Priority date | — |
| Expiry date | May 27, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a sense amplifier circuit includes an amplifier having an input terminal connected to a sense node, and a first capacitor configured to be connected in a feedback path of the amplification transistor and to a bit line of a memory cell via the sense node, the first capacitor configured to supply a current to the memory cell and integrate the current when the memory cell is read.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.